Patent · US Active

System and method for reducing temperature variation during burn in

US8843344B2 · kind B2 · utility

0Cited by
69References
20Claims
0Family size

Inventors

Key dates

Filing dateJul 20, 2009
Grant dateSep 23, 2014
Priority date
Expiry dateFeb 18, 2030

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG01R31/2879
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

Systems and methods for reducing temperature variation during burn-in testing. In one embodiment, power consumed by an integrated circuit under test is measured. An ambient temperature associated with the integrated circuit is measured. A desired junction temperature of the integrated circuit is achieved by adjusting a body bias voltage of the integrated circuit. By controlling temperature of individual integrated circuits, temperature variation during burn-in testing can be reduced.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.