Programmable impedance memory elements, methods of manufacture, and memory devices containing the same
US8847191B1 · kind B1 · utility
1Cited by
4References
15Claims
0Family size
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Key dates
| Filing date | Mar 27, 2012 |
| Grant date | Sep 30, 2014 |
| Priority date | — |
| Expiry date | Mar 27, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/883
Abstract
A memory device can include a plurality of memory elements, each including first electrode having a surrounding first electrode side surface in a lateral direction; a memory material surrounding the first electrode side surface in the lateral direction, the memory material being programmable between at least two different impedance states in response to electric fields; and a second electrode formed around the memory material in the lateral direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.