Ternary content addressable memory
US8848412B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 5, 2013 |
| Grant date | Sep 30, 2014 |
| Priority date | — |
| Expiry date | Jul 5, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/56
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A ternary content addressable memory (TCAM) has at least one TCAM cell comprising first and second memory bitcells for storing first and second bit values representing a cell state comprising one of a first cell state, a second cell state and a mask cell state. The first and second memory bitcells share a pair of bitlines for accessing the first and second bit values. Access control circuitry is provided for triggering, in response to a clock signal, a read or write access to the first memory bitcell during a first portion of a clock cycle and triggering a read access or write access to the second read bitcell during a second portion of the clock cycle.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.