Memory ordered store system in a multiprocessor computer system
US8850129B2 · kind B2 · utility
1Cited by
12References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Jun 24, 2010 |
| Grant date | Sep 30, 2014 |
| Priority date | — |
| Expiry date | Mar 5, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/621
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and computer implemented method for storing of data in the memory of a computer system in order at a fast rate is provided. The method includes launching a first store to memory. A wait counter is initiated. A second store to memory is speculatively launched when the wait counter expires. The second store to memory is cancelled when the second store achieves coherency prior to the first store to memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.