Multi-core electronic system having a rate adjustment module for setting a minimum transmission rate that is capable for meeting the total bandwidth requirement to a shared data transmission interface
US8850248B2 · kind B2 · utility
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6References
11Claims
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Assignee
Inventors
Key dates
| Filing date | Jul 26, 2011 |
| Grant date | Sep 30, 2014 |
| Priority date | — |
| Expiry date | Nov 18, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multi-core electronic system for accessing a data storage device includes a plurality of processors, a data transmission interface and a rate adjustment module. The processors respectively provide a bandwidth requirement, and communicate with the data storage device via the shared data transmission interface. The rate adjustment module receives the bandwidth requirements, and determines a transmission rate of the data transmission interface according to the bandwidth requirements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.