Chung-Ching Chen
17Patents
4h-index
24Co-inventors
60Inventor score
Filing activity: Aug 18, 1998 → Aug 7, 2018
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6073881A | Aerodynamic lift apparatus | Mechanical Engineering; Lighting; Heating | 121 | Expired |
| US8478581B2 | Interlingua, interlingua engine, and interlingua machine translation system | Physics | 41 | Active |
| US8405678B2 | Display controller for displaying multiple windows and method for the same | Physics | 10 | Active |
| US6321301A | Cache memory device with prefetch function and method for asynchronously renewing tag addresses and data during cache miss states | Physics | 7 | Expired |
| US9355744B2 | Dynamic memory signal phase tracking method and associated control circuit | Physics | 1 | Active |
| US8773932B2 | Built-in self-test circuit applied to high speed I/O port | Physics | 1 | Active |
| US9424902B2 | Memory controller and associated method for generating memory address | Physics | 1 | Active |
| US9460649B2 | Timing controller for image display and associated control method | Physics | 0 | Active |
| US10090061B2 | Memory test data generating circuit and method | Physics | 0 | Active |
| US8782332B2 | Control method and controller for DRAM | Physics | 0 | Active |
| US10726902B2 | Circuit for controlling memory and associated method | Emerging Cross-Sectional Technologies | 0 | Active |
| US9697148B2 | Apparatus and method for managing memory | Physics | 0 | Active |
| US8850248B2 | Multi-core electronic system having a rate adjustment module for setting a minimum transmission rate that is capable for meeting the total bandwidth requirement to a shared data transmission interface | Emerging Cross-Sectional Technologies | 0 | Active |
| US9589671B2 | Self testing device for memory channels and memory control units and method thereof | Physics | 0 | Active |
| US9378800B2 | Memory controller and associated signal generating method | Physics | 0 | Active |
| US8635569B2 | Apparatus and method of generating universal memory I/O | Physics | 0 | Active |
| US9437262B2 | Memory controller and associated signal generating method | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.