Tunneling field effect transistor and method for forming the same
US8860140B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 24, 2011 |
| Grant date | Oct 14, 2014 |
| Priority date | — |
| Expiry date | Oct 8, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6739
Abstract
The present disclosure provides a TFET, which comprises: a substrate; a channel region formed in the substrate, and a source region and a drain region formed on two sides of the channel region; a gate stack formed on the channel region, wherein the gate stack comprises: a gate dielectric layer, and at least a first gate electrode and a second gate electrode distributed in a direction from the source region to the drain region and formed on the gate dielectric layer, and the first gate electrode and the second gate electrode have different work functions; and a first side wall and a second side wall formed on a side of the first gate electrode and on a side of the second gate electrode respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.