Method of forming electronic components with increased reliability
US8860495B2 · kind B2 · utility
17Cited by
97References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2013 |
| Grant date | Oct 14, 2014 |
| Priority date | — |
| Expiry date | Oct 31, 2033 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49117
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An electronic component includes a depletion-mode transistor, an enhancement-mode transistor, and a resistor. The depletion-mode transistor has a higher breakdown voltage than the enhancement-mode transistor. A first terminal of the resistor is electrically connected to a source of the enhancement-mode transistor, and a second terminal of the resistor and a source of the depletion-mode transistor are each electrically connected to a drain of the enhancement-mode transistor. A gate of the depletion-mode transistor can be electrically connected to a source of the enhancement-mode transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.