System and method for performing SRAM write assist
US8861290B2 · kind B2 · utility
13Cited by
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20Claims
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Key dates
| Filing date | Dec 10, 2012 |
| Grant date | Oct 14, 2014 |
| Priority date | — |
| Expiry date | Dec 10, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/419
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and a system are provided for performing write assist. Write assist circuitry is initialized and voltage collapse is initiated to reduce a column supply voltage provided to a storage cell. A bitline of the storage cell is boosted to a boosted voltage level that is below a low supply voltage provided to the storage cell and data encoded by the bitline is written to the storage cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.