Method of making a non-volatile double gate memory cell

US8865548B2 · kind B2 · utility

Assignee

• COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES · FR

Inventors

• Christelle Charpin-Nicolle · Grenoble, FR
• Eric Jalaguier · Meylan, FR

Key dates

• Filing date: Jan 8, 2013
• Grant date: Oct 21, 2014
• Expiry date: Feb 16, 2033

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/037

Abstract

A method of making a non-volatile double-gate memory cell. The gate of the control transistor is formed with a relief of a semiconductor material on a substrate. The control gate of the memory transistor is formed with a sidewall of the relief of a semiconductor material configured to store electrical charge. A first layer is deposited so as to cover the stack of layers. The first layer is etched so as to form a first pattern juxtaposed on the relief. A second layer is formed on the first pattern. The second layer is etched so as to form on the first pattern a second pattern having a substantially plane upper face.