Semiconductor structure and fabrication method thereof
US8866293B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 23, 2011 |
| Grant date | Oct 21, 2014 |
| Priority date | — |
| Expiry date | Jun 23, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0132
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure includes a semiconductor chip having at least an electrode pad, a first metal layer formed on the electrode pad, a second metal layer completely formed on and in contact with the first metal layer, and a conductive pillar disposed on the second metal layer, where a material of the first metal layer is different from a material of the second metal layer, the first metal layer has a first distribution-projected area larger than a second distribution projected-area of the conductive pillar, and the second metal layer has a third distribution-projected area that is the same as the second distribution-projected area of the conductive pillar.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.