Chip package
US8872196B2 · kind B2 · utility
Inventors
Key dates
| Filing date | Dec 19, 2012 |
| Grant date | Oct 28, 2014 |
| Priority date | — |
| Expiry date | Dec 19, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F71/137
Abstract
An embodiment of the invention provides a chip package which includes: a semiconductor substrate having a first surface and a second surface; a sensor region formed in the semiconductor substrate; a light emitting device disposed on the second surface of the semiconductor substrate; at least one first conducting bump disposed on the first surface of the semiconductor substrate and electrically connected to the sensor region; at least one second conducting bump disposed on the first surface of the semiconductor substrate and electrically connected to the light emitting device; and an insulating layer located on the semiconductor substrate to electrically insulate the semiconductor substrate from the at least one first conducting bump and the at least one second conducting bump.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.