Strained-channel semiconductor device fabrication
US8872228B2 · kind B2 · utility
1Cited by
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19Claims
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Assignee
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Key dates
| Filing date | May 11, 2012 |
| Grant date | Oct 28, 2014 |
| Priority date | — |
| Expiry date | May 11, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/856
Abstract
A method for controlling IC device strain and the devices thereby formed are disclosed. An exemplary embodiment includes receiving an IC device substrate having a device region corresponding to an IC device. An implantation process is performed on the device region forming an amorphous region within the device region. The IC device substrate is recessed to define a source/drain recess in the device region having a profile determined by the amorphous structure of the amorphous region. A source/drain epitaxy is then performed to form a source/drain structure within the source/drain recess.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.