Embedded memory and dedicated processor structure within an integrated circuit
US8874837B2 · kind B2 · utility
2Cited by
29References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 8, 2011 |
| Grant date | Oct 28, 2014 |
| Priority date | — |
| Expiry date | May 7, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L45/74
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An integrated circuit can include a programmable circuitry operable according to a first clock frequency and a block random access memory. The block random access memory can include a random access memory (RAM) element having at least one data port and a memory processor coupled to the data port of the RAM element and to the programmable circuitry. The memory processor can be operable according to a second clock frequency that is higher than the first clock frequency. Further, the memory processor can be hardwired and dedicated to perform operations in the RAM element of the block random access memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.