Method of manufacturing a magnetoresistive-based device with via integration
US8877522B2 · kind B2 · utility
6Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 21, 2014 |
| Grant date | Nov 4, 2014 |
| Priority date | — |
| Expiry date | May 21, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method is provided for forming a first via with an electrically conductive material, for example, copper, that is formed over and coupled to a conductive landing pad of an MRAM array. A sputter step is performed to lower the surface of the first via below that of a surrounding dielectric material. This recess is repeated in subsequent processing steps, providing alignment marks for the formation of a magnetic tunnel junction. The magnetic tunnel junction may be offset from the first via, and a second via being formed above the magnetic tunnel junction and to a conductive layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.