LDMOS device with double-sloped field plate
US8878275B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 18, 2013 |
| Grant date | Nov 4, 2014 |
| Priority date | — |
| Expiry date | Feb 18, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/516
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In one general aspect, an apparatus can include a channel region disposed in a semiconductor substrate, a gate dielectric disposed on the channel region and a drift region disposed in the semiconductor substrate adjacent to the channel region. The apparatus can further include a field plate having an end portion disposed between a top surface of the semiconductor substrate and the gate dielectric The end portion can include a surface in contact with the gate dielectric, the surface having a first portion aligned along a first plane non-parallel to a second plane along which a second portion of the surface is aligned, the first plane being non-parallel to the top surface of the semiconductor substrate and the second plane being non-parallel to the top surface of the semiconductor substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.