Patent · US Active

Output buffer

US8884337B2 · kind B2 · utility

0Cited by

0References

10Claims

0Family size

Assignee

UNITED MICROELECTRONICS CORP. · TW

Inventors

Chang-Tzu Wang · Taoyuan, TW
Ping-Chen Chang · Chunri, TW
Tien-Hao Tang · Hsinchu, TW

Key dates

Filing date	Apr 8, 2013
Grant date	Nov 11, 2014
Priority date	—
Expiry date	Apr 8, 2033

Classification

Technology area (CPC H)Electricity
CPC primaryH10D84/85
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

An output buffer includes an input/output end, a voltage source, a first transistor and a second transistor. The first transistor includes a first end coupled to the input/output end, a second end coupled to the voltage source, and a control end coupled to the voltage source. The second transistor includes a first end coupled to the input/output end, a second end coupled to the voltage source, and a control end coupled to the voltage source. The control end of the first transistor and the control end of the second transistor are substantially perpendicular to each other, and the punch through voltage of the first transistor is higher than the punch through voltage of the second transistor.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.