Method for manufacturing a memory cell, a method for manufacturing a memory cell arrangement, and a memory cell
US8884352B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 8, 2012 |
| Grant date | Nov 11, 2014 |
| Priority date | — |
| Expiry date | Oct 8, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/681
Abstract
A method for manufacturing a memory cell in accordance with various embodiments may include: forming at least one charge storing memory cell structure over a substrate, the charge storing memory cell structure having a first sidewall and a second sidewall opposite the first sidewall; forming an electrically conductive layer over the substrate and the charge storing memory cell structure; patterning the electrically conductive layer to form a spacer at the first sidewall and a blocking structure at the second sidewall of the charge storing memory cell structure; implanting first dopant atoms to form a first doped region in the substrate proximate the spacer, wherein the first dopant atoms are blocked by the blocking structure; removing the blocking structure after implanting the first dopant atoms; implanting second dopant atoms to form a second doped region in the substrate proximate the second sidewall of the charge storing memory cell structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.