Semiconductor chip and stacked semiconductor package having the same
US8884445B2 · kind B2 · utility
7Cited by
0References
12Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 13, 2012 |
| Grant date | Nov 11, 2014 |
| Priority date | — |
| Expiry date | Sep 17, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor chip includes a substrate having one surface and an other surface which substantially faces away from the one surface; at least two alignment bumps formed on the one surface of the substrate and having different diameters; and at least two alignment grooves defined on the other surface of the substrate and having different diameters.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.