Adaptive programming for non-volatile memory devices
US8885413B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 20, 2012 |
| Grant date | Nov 11, 2014 |
| Priority date | — |
| Expiry date | Jan 18, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and techniques for performing write operations on non-volatile memory are described. A described system includes a memory structure including non-volatile memory cells that are arranged on word lines and bit lines and a microcontroller that is communicatively coupled with the memory structure. The memory structure can include non-volatile memory cells that are arranged on word lines and bit lines. The microcontroller can be configured to receive data to write to the memory structure, write the data to the memory structure using a selected word line of the word lines, detect a failure to write the data, apply, based on the failure, a negative bias voltage to one or more unselected word lines of the word lines during a negative bias period, and write the data to the portion of the memory cells using the selected word line during the negative bias period.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.