Method and system for providing efficient on-product clock generation for domains compatible with compression
US8887019B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 16, 2010 |
| Grant date | Nov 11, 2014 |
| Priority date | — |
| Expiry date | Jun 20, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318536
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method and system for providing on-product clocks for domains compatible with compression is disclosed. According to one embodiment, a base signal received from automated test equipment has a frequency for testing a plurality of clock domains and programming instruction for first and second clock domains of a plurality of clock domains. First and second clock signals are generated from the base clock signal based on the programming instruction. A first delay for the first clock signal and a second delay for the second clock signal are determined from the programming instruction. A test sequence is provided to test a first clock domain and a second clock domain. The test sequence comprises the first clock signal delayed by the first delay and the second clock signal delayed by the second delay. The first clock drives the first clock domain and the second clock derives the second clock domain.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.