Inventor · Binghamton, NY, US

Brion Keller

18Patents
11h-index
28Co-inventors
72Inventor score

Filing activity: Jun 9, 1994 → Mar 17, 2016

Most-cited inventions

PatentTitleAreaCited byStatus
US6611933B1 Real-time decoder for scan test patterns Physics 49 Expired
US7523370B1 Channel masking during integrated circuit testing Physics 36 Active
US7487420B2 System and method for performing logic failure diagnosis using multiple input signature register output streams Physics 22 Active
US5546408A Hierarchical pattern faults for describing logic circuit failure mechanisms Physics 19 Expired
US8468404B1 Method and system for reducing switching activity during scan-load operations Physics 18 Active
US6986090B2 Method for reducing switching activity during a scan operation with limited impact on the test coverage of an integrated circuit Physics 18 Expired
US6782501B2 System for reducing test data volume in the testing of logic products Physics 17 Expired
US7693676B1 Low power scan test for integrated circuits Physics 13 Active
US6708305B1 Deterministic random LBIST Physics 13 Expired
US9404969B1 Method and apparatus for efficient hierarchical chip testing and diagnostics with support for partially bad dies Physics 11 Active
US8732632B1 Method and apparatus for automated extraction of a design for test boundary model from embedded IP cores for hierarchical and three-dimensional interconnect test Physics 11 Active
US8296703B1 Fault modeling for state retention logic Physics 5 Active
US7435990B2 Arrangement for testing semiconductor chips while incorporated on a semiconductor wafer Electricity 4 Expired
US7381986B2 Arrangement for testing semiconductor chips while incorporated on a semiconductor wafer Electricity 3 Active
US6804803B2 Method for testing integrated logic circuits Physics 3 Expired
US7103816B2 Method and system for reducing test data volume in the testing of logic products Physics 2 Expired
US8887019B2 Method and system for providing efficient on-product clock generation for domains compatible with compression Physics 2 Active
US9864004B1 System and method for diagnosing failure locations in electronic circuits Physics 2 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.