III-V semiconductor interface with graded GeSn on silicon
US8889978B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 14, 2012 |
| Grant date | Nov 18, 2014 |
| Priority date | — |
| Expiry date | Feb 9, 2033 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02E10/544
Abstract
A method of depositing III-V solar collection materials on a GeSn template on a silicon substrate including the steps of providing a crystalline silicon substrate and epitaxially growing a single crystal GeSn layer on the silicon substrate using a grading profile to grade Sn through the layer. The single crystal GeSn layer has a thickness in a range of approximately 3 μm to approximately 5 μm. A layer of III-V solar collection material is epitaxially grown on the graded single crystal GeSn layer. The graded single crystal GeSn layer includes Sn up to an interface with the layer of III-V solar collection material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.