Patent · US Active

Incremental concurrent processing for efficient computation of high-volume layout data

US8893061B2 · kind B2 · utility

5Cited by
40References
8Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 3, 2014
Grant dateNov 18, 2014
Priority date
Expiry dateMar 3, 2034

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F30/39
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Some embodiments of the present invention overcome I/O bottlenecks of an EDA work flow by keeping layout data distributed during handoffs among different processing stages. Specifically, some embodiments leverage a concurrent computation paradigm where data is propagated incrementally between stages, and where data processing among consecutive stages and the I/O between stages are executed concurrently. Specifically, different data processing stages can partition the layout data differently, and portions of the layout data that are not required by a data processing stage can be either passed-through or passed-around the data processing stage.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.