System for preventing tampering with integrated circuit
US8896086B1 · kind B1 · utility
7Cited by
6References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 30, 2013 |
| Grant date | Nov 25, 2014 |
| Priority date | — |
| Expiry date | Aug 14, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system for generating a tamper detection signal indicating tampering with one or more circuits of an integrated circuit (IC) includes a tamper detection module, and wire-pairs connected to the tamper detection module and arranged in a winding configuration to form a wire-mesh. The wire-mesh is placed a predefined distance from the circuits. The tamper detection module generates and provides serial bit-streams to the wire-pairs for detecting a breach in the wire-mesh by an external probe.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.