Field effect transistor with a vertical channel and fabrication method thereof
US8901644B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 9, 2011 |
| Grant date | Dec 2, 2014 |
| Priority date | — |
| Expiry date | Sep 9, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/518
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
Disclosed herein is a field effect transistor with a vertical channel and a fabrication method thereof. A channel region of the field effect transistor is a circular ring-shaped Si platform, which is formed over a substrate and perpendicular to the substrate; a source, which is made of polysilicon, is located at an upper end of the Si platform; a drain is disposed at an outside of a lower end of the circular ring-shaped Si platform; a gate is placed on an outer side surface of the circular ring-shaped Si platform; and an inside of the circular ring-shaped Si platform is filled with a dielectric material. In comparison with the conventional vertical structure MOSFET with a Si platform, the circular ring-shaped structure field effect transistor according to the invention can effectively suppress the short channel effect and improve the device performance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.