Power MOSFET comprising a plurality of columnar structures defining the charge balancing region

US8901652B2 · kind B2 · utility

Assignee

• STMicroelectronics SA

Inventors

• Mario Giuseppe Saggio · Nettuno, IT
• Alfio GUARNERA · Trecastagni, IT
• Simone RASCUNÁ · Catania, IT

Key dates

• Filing date: Aug 25, 2010
• Grant date: Dec 2, 2014
• Expiry date: Oct 31, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/516

Abstract

An embodiment of a semiconductor structure for a power device integrated on a semiconductor substrate, of a first type of conductivity, and comprising:—an epitaxial layer, of said first type of conductivity, made on said semiconductor substrate, and having a plurality of column structures, of a second type of conductivity, to define a charge balancing region;—an active surface layer made on said epitaxial layer for housing a plurality of active regions; said epitaxial layer comprising a semiconductor separating layer arranged between the charge balancing region and the active surface layer, said semiconductor separating layer decoupling said column structures from said active regions.