Semiconductor-on-insulator (SOI) field effect transistor with buried epitaxial active regions
US8901654B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 10, 2013 |
| Grant date | Dec 2, 2014 |
| Priority date | — |
| Expiry date | Jul 10, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6758
Abstract
A material stack including a semiconductor channel portion, a gate dielectric, a gate electrode, and a gate cap dielectric portion is formed on an insulator layer. The material stack is laterally enclosed by a dielectric spacer including a dielectric material that is different from the dielectric material of the insulator layer. The material stack and the dielectric spacer are undercut by an isotropic etch that removes the material of the insulator layer selective to the material of the dielectric spacer. A selective epitaxy process is employed to deposit a doped semiconductor material, which forms a source region and a drain region that are epitaxially in contact with the semiconductor channel portion. Metal semiconductor alloy portions can be formed on the source region and the drain region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.