Integrated circuit arrangement with an auxiliary indentation, particularly with aligning marks
US8901737B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 11, 2010 |
| Grant date | Dec 2, 2014 |
| Priority date | — |
| Expiry date | Aug 23, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An integrated circuit arrangement is disclosed having a wiring indentation and an auxiliary indentation in a dielectric layer. The wiring indentation contains a metal through which current flows during operation of the circuit arrangement. The auxiliary indentation contains a metal through which an electric current does not flow during operation of the circuit arrangement. The auxiliary indentation serves as an alignment mark during the production of the integrated circuit arrangement.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.