Dual hard mask lithography process

US8916337B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• John C. Arnold · North Chatham, US
• Sean D. Burns · Yorktown Heights, US
• Steven J. Holmes · Colchester, US
• David V. Horak · South Burlington, US
• Muthumanickam Sankarapandian · Niskayuna, US
• Yunpeng Yin · Guilderland, US

Key dates

• Filing date: Feb 22, 2012
• Grant date: Dec 23, 2014
• Expiry date: Aug 28, 2032

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10T428/24355
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A first metallic hard mask layer over an interconnect-level dielectric layer is patterned with a line pattern. At least one dielectric material layer, a second metallic hard mask layer, a first organic planarization layer (OPL), and a first photoresist are applied above the first metallic hard mask layer. A first via pattern is transferred from the first photoresist layer into the second metallic hard mask layer. A second OPL and a second photoresist are applied and patterned with a second via pattern, which is transferred into the second metallic hard mask layer. A first composite pattern of the first and second via patterns is transferred into the at least one dielectric material layer. A second composite pattern that limits the first composite pattern with the areas of the openings in the first metallic hard mask layer is transferred into the interconnect-level dielectric layer.