Nonvolatile memory devices, operating methods thereof and memory systems including the same
US8917558B2 · kind B2 · utility
6Cited by
65References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 6, 2011 |
| Grant date | Dec 23, 2014 |
| Priority date | — |
| Expiry date | Apr 28, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/26
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Nonvolatile memory device, operating methods thereof, and memory systems including the same. In the operating method, a ground select line of a first string connected to a bit line may be floated. An erase prohibition voltage may be applied to a ground select line of a second string connected to the bit line. An erase operation voltage may be applied to the first and second strings.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.