Reducing bias in hardware generated random numbers
US8918443B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 16, 2013 |
| Grant date | Dec 23, 2014 |
| Priority date | — |
| Expiry date | Jun 5, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/588
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A random number generator of a processor comprises a whitener for reducing the bias in random numbers generated by the random number generator. The whitener receives a random number of a first length read by an array of latches with inputs from an array of oscillators. The whitener dynamically creates a mask of the first length based on a parity of at least one previous random number read from the array of latches during at least one cycle prior to reading the random number. The whitener applies a compare operation between the random number and the mask to generate a whitened random number of the first length, with reduced bias, without reducing randomness.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.