Method for manufacturing epitaxial wafer
US8920560B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 2, 2007 |
| Grant date | Dec 30, 2014 |
| Priority date | — |
| Expiry date | Nov 22, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T428/26
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
A method for manufacturing an epitaxial wafer includes: a step of pulling a single crystal from a boron-doped silicon melt in a chamber based on a Czochralski process; and a step of forming an epitaxial layer on a surface of a silicon wafer sliced from the single crystal. The single crystal is allowed to grow while passed through a temperature region of 800 to 600° C. in the chamber in 250 to 180 minutes during the pulling step. The grown single crystal has an oxygen concentration of 10×1017 to 12×1017 atoms/cm3 and a resistivity of 0.03 to 0.01 Ωcm. The silicon wafer is subjected to pre-annealing prior to the step of forming the epitaxial layer on the surface of the silicon wafer, for 10 minutes to 4 hours at a predetermined temperature within a temperature region of 650 to 900° C. in an inert gas atmosphere. The method is to fabricate an epitaxial wafer that has a diameter of 300 mm or more, and that attains a high IG effect, and involves few epitaxial defects.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.