Mapping table for improving write operation efficiency
US8924629B1 · kind B1 · utility
11Cited by
1References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 7, 2011 |
| Grant date | Dec 30, 2014 |
| Priority date | — |
| Expiry date | Jun 25, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7205
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile storage system is disclosed which provides a mapping table which includes a granularity which does not correspond to the page size of a non-volatile storage array. A reduced mapping table granularity enables more than one mapping entry to exist in a single page on the solid-state array. A write command which does not exceed a mapping table entry can invalidate only a portion of the written page, and can be combined with a second write command to write a new page of the solid-state array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.