Quality of service targets in multicore processors
US8924754B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 2, 2012 |
| Grant date | Dec 30, 2014 |
| Priority date | — |
| Expiry date | Sep 28, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Technologies are described herein for adapting a processor core on a multicore processor to achieve a quality of service target. Some example technologies may identify a target level of a resource on the computer. The technologies may identify a first utilization value and a second utilization value of the resource when the processor core operates at a first frequency and a second frequency. The technologies may generate a linear interpolation between a first point and a second point. Coordinates of the first point may include the first frequency and the first utilization value. Coordinates of the second point may include the second frequency and the second utilization value. The technologies may set the processor core to operate at a third frequency, which can be specified as one of the coordinates in an intersection point between the linear interpolation and the target level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.