Transistor with high breakdown voltage having separated drain extensions

US8928111B2 · kind B2 · utility

Assignee

• Micron Technology, Inc. · US

Inventor

• Mike Smith · Cambridge, US

Key dates

• Filing date: Nov 22, 2011
• Grant date: Jan 6, 2015
• Expiry date: Nov 22, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/151

Abstract

Transistors are formed using pitch multiplication. Each transistor includes a source region and a drain region connected by strips of active area material separated by shallow trench isolation (STI) structures, which are formed by dielectric material filling trenches formed by pitch multiplication. During pitch multiplication, rows of spaced-apart mandrels are formed and spacer material is deposited over the mandrels. The spacer material is etched to define spacers on sidewalls of the mandrels. The mandrels are removed, leaving free-standing spacers. The spacers constitute a mask, through which an underlying substrate is etched to form the trenches and strips of active area material. The trenches are filled to form the STI structures. The substrate is doped, forming source, drain and channel regions. A gate is formed over the channel region. In some embodiments, the STI structures and the strips of material facilitate the formation of transistors having a high breakdown voltage.