Interlocking type solder connections for alignment and bonding of wafers and/or substrates
US8928133B2 · kind B2 · utility
1Cited by
1References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 7, 2012 |
| Grant date | Jan 6, 2015 |
| Priority date | — |
| Expiry date | Oct 9, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06593
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An apparatus comprising a first substrate and a second substrate. The first substrate has disposed thereon a first feature. The second substrate has disposed thereon a second feature. The first feature is configured to interlock with the second feature such that the first substrate and the second substrate are aligned by the first and the second features within a predefined accuracy.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.