On-chip noise measurement
US8928334B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 20, 2012 |
| Grant date | Jan 6, 2015 |
| Priority date | — |
| Expiry date | Aug 7, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31708
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An apparatus relating to on-chip noise measurement is disclosed. In such an apparatus, an asynchronous comparator receives a first input and a second input to provide a digital output. A threshold voltage generator receives a first periodic signal and a second periodic signal to provide the second input as an analog voltage responsive to the first and second periodic signals. A sampling circuit is coupled to receive the digital output signal and a third periodic signal. The sampling circuit is configured to sample the digital output signal using the third periodic signal to provide a sampled signal of the digital output signal. A processor is coupled to receive a delay signal and the sampled signal to determine a noise measurement signal for the first input signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.