Methods of controlling clocks in system on chip including function blocks, systems on chips and semiconductor systems including the same
US8928385B2 · kind B2 · utility
8Cited by
7References
35Claims
0Family size
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Key dates
| Filing date | Nov 28, 2012 |
| Grant date | Jan 6, 2015 |
| Priority date | — |
| Expiry date | Nov 28, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/50
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A system-on-chip includes a clock controller configured to decrease an operating frequency of at least one function block based on a change in an operating state of the at least one function block from an active state to an idle state. In a method of operating a system-on-chip including at least one function block, an operating frequency of the at least one function block is decreased based on a change in an operating state of the at least one function block from an active state to an idle state. The decreased operating frequency is greater than zero.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.