Power management for nonvolatile memory array
US8929169B1 · kind B1 · utility
14Cited by
35References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 13, 2014 |
| Grant date | Jan 6, 2015 |
| Priority date | — |
| Expiry date | May 13, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a nonvolatile memory array, power is provided to groups of memory dies by power management circuits that have different power modes. While one power management circuit is in a high-power mode supplying power for power-hungry memory operations, another power management circuit is in a low-power mode so that overall power usage is balanced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.