Decoder in a device receiving data having an error correction code and a method of decoding data
US8930787B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 1, 2011 |
| Grant date | Jan 6, 2015 |
| Priority date | — |
| Expiry date | Mar 13, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/19
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A decoder in a device receiving data having an error correction code is described. The decoder comprises a memory storing program code having instructions including control signals for decoding an error correction code; an address generator coupled to the memory, the address generator updating an address coupled to the memory for generating a next control signal; and a data processing circuit coupled to receive an instruction from the memory and further coupled to receive syndrome data, the data processing circuit generating error correction values. A method for decoding data having an error correction code is also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.