Semiconductor device for semiconductor package having through silicon vias of different heights
US8933561B2 · kind B2 · utility
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19Claims
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Key dates
| Filing date | Aug 17, 2011 |
| Grant date | Jan 13, 2015 |
| Priority date | — |
| Expiry date | Mar 9, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19104
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided is a semiconductor device. The semiconductor device may include a first semiconductor chip that includes a first through silicon via having a first protrusion height and a second through silicon via having a second protrusion height greater than the first protrusion height which are penetrating at least a portion of the first semiconductor chip, a second semiconductor chip may be electrically connected to the first through silicon via, and a third semiconductor chip may be electrically connected to the second through silicon via.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.