Chungsun Lee
29Patents
5h-index
47Co-inventors
65Inventor score
Filing activity: Aug 12, 2009 → May 20, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8759147B2 | Semiconductor packages and methods of fabricating the same | Electricity | 47 | Active |
| US8928132B2 | Semiconductor package having through silicon via (TSV) interposer and method of manufacturing the semiconductor package | Electricity | 30 | Active |
| US8105934B2 | Bump structure for a semiconductor device and method of manufacture | Electricity | 14 | Active |
| US10157766B2 | Method of fabricating a semiconductor device | Electricity | 6 | Active |
| US9023716B2 | Methods for processing substrates | Emerging Cross-Sectional Technologies | 5 | Active |
| US9006081B2 | Methods of processing substrates | Electricity | 4 | Active |
| US9059072B2 | Semiconductor packages and methods of fabricating the same | Electricity | 3 | Active |
| US9412636B2 | Methods for processing substrates | Emerging Cross-Sectional Technologies | 2 | Active |
| US11996358B2 | Semiconductor packages having first and second redistribution patterns | Electricity | 1 | Active |
| US11335719B2 | Semiconductor package including an image sensor chip and a method of fabricating the same | Electricity | 0 | Active |
| US9595446B2 | Methods of processing substrates | Electricity | 0 | Active |
| US11854893B2 | Method of manufacturing semiconductor package | Electricity | 0 | Active |
| US11637058B2 | Interconnection structure and semiconductor package including the same | Electricity | 0 | Active |
| US12014977B2 | Interconnection structure, method of fabricating the same, and semiconductor package including interconnection structure | Electricity | 0 | Active |
| US12368093B2 | Semiconductor packages | Electricity | 0 | Active |
| US12394641B2 | Molding apparatus of semiconductor package | Electricity | 0 | Active |
| US11824076B2 | Semiconductor package including an image sensor chip and a method of fabricating the same | Electricity | 0 | Active |
| US11705323B2 | Wafer trimming device | Electricity | 0 | Active |
| US12224256B2 | Wafer structure and semiconductor device | Electricity | 0 | Active |
| US11688679B2 | Interconnection structure, method of fabricating the same, and semiconductor package including interconnection structure | Electricity | 0 | Active |
| US8933561B2 | Semiconductor device for semiconductor package having through silicon vias of different heights | Electricity | 0 | Active |
| US11923309B2 | Semiconductor package including fine redistribution patterns | Electricity | 0 | Active |
| US12218102B2 | Semiconductor package | Electricity | 0 | Active |
| US12094847B2 | Semiconductor package and method of manufacturing the same | Electricity | 0 | Active |
| US12009288B2 | Interconnection structure and semiconductor package including the same | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.