Balanced method for programming multi-layer cell memories
US8934292B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 18, 2011 |
| Grant date | Jan 13, 2015 |
| Priority date | — |
| Expiry date | Jul 10, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/32
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Improved methods for programming multi-level metal oxide memory cells balance applied voltage and current to provide improved performance. Set programming, which transitions the memory cell to a lower resistance state, is accomplished by determining an appropriate programming voltage and current limit for the objective resistance state to be achieved in the programming and then applying a pulse having the determined set electrical characteristics. Reset programming, which transitions the memory cell to a higher resistance state, is accomplished by determining an appropriate programming voltage and optionally current limit for the state to be achieved in the programming and then applying a pulse having the determined electrical characteristics. The algorithm used to determine the appropriate set or reset programming voltage and current values provides for effective programming without stressing the memory element. The electrical characteristics for programming pulses may be stored in a data table used in a table look up algorithm.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.