3-D nonvolatile memory device and method of manufacturing the same
US8936984B2 · kind B2 · utility
0Cited by
0References
9Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 29, 2012 |
| Grant date | Jan 20, 2015 |
| Priority date | — |
| Expiry date | Feb 14, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D88/00
Abstract
A three-dimensional (3-D) nonvolatile memory device includes channel layers protruding perpendicular to a surface of a substrate, interlayer insulating layers and conductive layer patterns alternately formed to surround each of the channel layers, a slit formed between the channel layers, the slit penetrating the interlayer insulating layers and the conductive layer patterns, and an etch-stop layer formed on the surface of the substrate at the bottom of the slit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.