Flash memory device
US8942044B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 9, 2012 |
| Grant date | Jan 27, 2015 |
| Priority date | — |
| Expiry date | Sep 17, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3418
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A flash memory device is provided. The flash memory device includes a memory cell array and a pre-charge unit. The pre-charge unit, coupled to a plurality of bit lines corresponding with the memory cell array, pre-charges the bit lines to a predetermined voltage during a pre-charge stage. The pre-charge unit includes a voltage stabilizing unit to provide a constant current to the bit lines. Due to the voltage stabilizing unit, in a programming process, the voltage applied to the bit lines which are not related with programming may not drop as a result of current leakage. Therefore, the memory cells except the memory cell to be programmed are kept in cut off state, without a current passing. As a result, interference with the memory cells which are not to be programmed may be effectively avoided and the accuracy of programming may be improved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.