Method of manufacturing a capacitor-embedded printed circuit board
US8943685B2 · kind B2 · utility
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6Claims
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Key dates
| Filing date | Oct 19, 2010 |
| Grant date | Feb 3, 2015 |
| Priority date | — |
| Expiry date | Dec 5, 2033 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49156
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a capacitor-embedded printed circuit board using a first conductive layer formed on one side of an insulation layer, the method including: forming a second conductive layer on one side of the first conductive layer; forming a second electrode by removing a portion of the second conductive layer; forming a first electrode by removing a portion of the first conductive layer in correspondence with the second electrode; and forming a dielectric layer on one side of the second electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.