Chip package and method of forming the same
US8945990B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 24, 2012 |
| Grant date | Feb 3, 2015 |
| Priority date | — |
| Expiry date | May 21, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments provide a method of forming a chip package. The method may include attaching at least one chip on a carrier, the chip including a plurality of chip pads on a surface of the chip opposite to the carrier; depositing a first adhesion layer on the carrier and on the chip pads of the chip, the first adhesion layer including tin or indium; depositing a second adhesion layer on the first adhesion layer, the second adhesion layer including a silane organic material; and depositing a lamination layer or an encapsulation layer on the second adhesion layer and the chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.