Diode structures using fin field effect transistor processing and method of forming the same
US8946038B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 25, 2013 |
| Grant date | Feb 3, 2015 |
| Priority date | — |
| Expiry date | Nov 25, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/221
Abstract
A method of forming one or more diodes in a fin field-effect transistor (FinFET) device includes forming a hardmask layer having a fin pattern, said fin pattern including an isolated fin area, a fin array area, and a FinFET area. The method further includes etching a plurality of fins into a semiconductor substrate using the fin pattern, and depositing a dielectric material over the semiconductor substrate to fill spaces between the plurality of fins. The method further includes planarizing the semiconductor substrate to expose the hardmask layer. The method further includes implanting a p-type dopant into the fin array area and portions of the FinFET area, and implanting an n-type dopant into the isolated fin area, a portion of the of fin array area surrounding the p-well and portions of the FinFET area. The method further includes annealing the semiconductor substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.