Gallium nitride semiconductor devices and method making thereof
US8946771B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 9, 2011 |
| Grant date | Feb 3, 2015 |
| Priority date | — |
| Expiry date | Jul 23, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
Abstract
The present disclosure relates to an enhancement mode gallium nitride (GaN) transistor device. The GaN transistor device has an electron supply layer located on top of a GaN layer. An etch stop layer (e.g., AlN) is disposed above the electron supply layer. A gate structure is formed on top of the etch stop layer, such that the bottom surface of the gate structure is located vertically above the etch stop layer. The position of etch stop layer in the GaN transistor device stack allows it to both enhance gate definition during processing (e.g., selective etching of the gate structure located on top of the AlN layer) and to act as a gate insulator that reduces gate leakage of the GaN transistor device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.